Integrated circuits (ICs) are typically assembled into packages that are physically and electrically coupled to a substrate such as a printed circuit board (substrate) to form an “electronic assembly”. The “electronic assembly” can be part of an “electronic system”. An “electronic system” is broadly defined herein as any product comprising an “electronic assembly”. Examples of electronic systems include computers (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, etc.), and the like.
In the field of IC package mounting there is a constant pressure to increase component density and performance while decreasing production costs. Each new generation of board-level packaging must provide increased performance while generally being smaller or more compact in size.
A substrate typically includes a number of insulation and metal layers selectively patterned to provide metal interconnect lines (referred to herein as “traces”), and a plurality of electronic components mounted on one or more surfaces of the substrate and functionally interconnected through the traces. The routing traces typically carry signals that are transmitted between the electronic components, such as ICs, of the system. Some ICs have a relatively large number of input/output (I/O) pads. The large number of I/O pads requires a relatively large number of routing traces. Some substrates require multiple layers of routing traces to accommodate all of the system interconnections. Routing traces located within different layers are typically connected electrically by vias formed in the board. A via can be made by making a hole through some or all layers of a substrate and then coating or plating the interior hole surface with an electrically conductive material, such as copper.
BGA is a surface mount technology that typically uses a plurality of conductive interconnects, which may be ball shaped and formed from solder or conductive polymers, on one surface of the component, as electrical and physical connections to the substrate. Each conductive ball connects to a conductor within the component and is coupled to corresponding metallized mounting or bonding pads (pads) on the surface of the substrate.
FIGS. 1A, 1B, and 1C illustrate conventional layouts for vias and pads in accordance with the prior art. A typical configuration on the substrate is the interstitial via or “dogbone” layout shown in FIG. 1A. System 100A illustrates the key feature of the dogbone layout, which is the separation of the vias, represented by via 110A from the pads represented by pad 114A. The vias are electrically coupled to the pads through traces represented by trace 112A. This physical separation, of the via from the pad, helps to prevent the conductive ball from wicking down the via during the soldering process. However, the dogbone layout provides limited open channel space (space between vias) for circuit connections. This limits the density of the connections.
FIG. 1B illustrates a variation known as a via-behind-pad (VPB) layout. System 100B, includes vias (e.g., 110B) coupled to pads (e.g., 114B) by traces (e.g., 112B). The distance between the vias and the pads (and hence the length of the traces) is less than the dogbone layout. This is achieved through improved solder mask registration technology. To further increase connection densities, a via-in-pad (VIP) layout is employed. FIG. 1C illustrates the VIP layout. In system 300, the vias (e.g., 110C) are implemented within the pads (e.g., 114C), thus conserving valuable “real estate” on the substrate that would otherwise be separately occupied by the via and the pad.
Though the higher connection density achieved with a VIP layout results in decreased package size and cost, it is not without drawbacks. The typical production process for a VIP-BGA substrate involves partially filling the via with solder mask material to prevent solder from draining down into the via and out the other side of the substrate. During assembly when the conductive balls of the IC/Package are reflowed (heated) to form the connections, volatile organic compounds (volatiles) within the solder mask may expand or “outgas” upwards into the overlying conductive balls. This may cause the conductive balls to expand creating short circuits with other conductive balls, or may cause voids where the conductive balls are supposed to make contact with the vias, creating open circuits, or may otherwise degrade or destroy the conductive ball, which adversely impacts reliability. This problem has been identified and addressed in the prior art, though not entirely satisfactorily, by significantly reducing the diameter of the via. Thus, less solder mask to plug the via and therefore less volatiles. This method results in reduced expansion of the conductive balls and reduced voids within the conductive balls, but has additional manufacturing and tooling costs.